Are you challenged by the digital hardware embedded in the products? Do you have a Bachelor- or Master’s Degree in Computer Sciences, Electrical Engineering or equivalent and experience in the design of FPGA’s systems? We might be looking for you!
As an FPGA Designer, your mission is to define, realize, manage and maintain the realization of FPGA designs that belong to the company-internal IP block library. This library is used to create and maintain electronics that is embedded in the products.
The FPGA Designer is responsible for the following:
Participate as an FPGA designer and expert in an Electronics-oriented design team.
Define and document requirements for the IP block’s in the organisation’s IP block library.
Contribute to the further development of the IP library by personally developing and maintaining IP blocks (i.e. coding).
Define, document and execute tests to ensure that the developed IP Blocks satisfy the requirements.
Solve IP-block related problems and/or manage problem resolution during integration.
Bachelor- or Master Degree in Electrical Engineering, Computer Sciences, “Technische Computer Kunde”, or equivalent.
- Experienced in the design of programmable logic (experience in the use of the VHDL design language is a strong plus).
- Technical knowledge of Programmable Logic but also of digital design in general.
- High motivated team player with good social- and communication skills.
- Ability to convince others of certain design choices based on arguments.
- Accurate, systematic approach, analytical, problem solving.
- Pragmatic attitude.
- Takes ownership in case of issues.
- Fluent English in word and in writing (Dutch is convenient but not mandatory).
Context of the position
The sector Development & Engineering (D&E) of the organisation is responsible for the specification, design and realization of the products in the portfolio. Within the sector D&E the department Electronic Development (EDEV) is responsible for the definition, realization, qualification and integration of all electronic functions and modules within these products. Within EDEV the group System Electrical Architecture (SEA) is responsible for the architecture, design, realization and qualification of electrical functions that are relevant for the system as a whole (i.e. not only for a particular subsystem or component). Within the scope of the SEA group the EGD team is responsible for the maintenance of the organisations’ IP library.
The FPGA Designer will report to the Team Lead of the EGD team.